IBIS Macromodel Task Group Meeting date: 4 November 2014 Members (asterisk for those attending): Altera: * David Banas ANSYS: * Dan Dvorscak Curtis Clark Avago (LSI) Xingdong Dai Cadence Design Systems: Ambrish Varma Brad Brim Kumar Keshavan Ken Willis Ericsson: Anders Ekholm IBM Steve Parker Intel: Michael Mirmak Keysight Technologies: * Fangyi Rao * Radek Biernacki Maxim Integrated Products: Hassan Rafat Mentor Graphics: * John Angulo * Arpad Muranyi Micron Technology: * Randy Wolff Justin Butterfield QLogic Corp. James Zhou Andy Joy eASIC Marc Kowalski SiSoft: * Walter Katz Todd Westerhoff Mike LaBonte Synopsys Rita Horner Teraspeed Consulting Group: Scott McMorrow Teraspeed Labs: * Bob Ross (Note: Agilent has changed to Keysight) The meeting was led by Arpad Muranyi. ------------------------------------------------------------------------ Opens: Arpad raised the question whether there will be any conflicts with the upcoming meetings and the Asian IBIS Summits. It was decided to NOT cancel any of the ATM meetings because most of the people attending the ATM teleconferences will not be traveling to Asia. -------------------------- Call for patent disclosure: - None ------------- Review of ARs: - Mentor, Keysight, Cadence investigate TX Dj issues. Radek reported that they did not receive any widespread requests for modifications, but there were a few. Walter reported that he wrote a BIRD to clarify the Tx Dj parameter. Arpad reported that Mentor did not get any requests on this subject. - Bob stated he he had an AR to send his concerns to Ambrish on BIRD 147 which he tried by his email didn't go through for some reason. - Walter send Redriver Flow BIRD to Mike for posting - Done. - Todd produce slides for co-optimization requirements discussion next week. - In progress. - Arpad to review IBIS spec for min max issues. - In progress. ------------- New Discussion: Tx_Dj topic Walter: Showed BIRD draft "Clarify definition of Tx_Dj". It changes the definition of Tx_DJ to remove the reference to deterministic jitter so that Tx_Dj is only Bounded Uncorrelated Jitter (BUJ). David: Doesn't it include sinusoidal jitter? Walter: That's Sj. He'll send it out to the reflector for further suggestions of wording. Fangyi: Are we using the wrong name for BUJ, are we calling it DJ? Tx_DJ specifies BUJ in this BIRD. David: This is not the original intent when DJ was introduced. It would be an envelope containing the total deterministic jitter if you didn't want to break down its individual components. Walter: Dj is bounded jitter. The formula in "Other Notes" means it is not correlated with data. The EDA tool must implement the jitter in the formula. Final Stage Subcircuit BIRD discussion Walter: Showed a picture about "Where are V-t curves measured?" The legacy IBIS model with C_comp doesn't well represent the behavior of some of the ESD circuits at the output of the buffer. David: What's driving the need to separate on-die interconnect from the buffer? Walter: On-die interconnect could be separate from the buffer with only C_comp. C_comp isn't modeling well the ESD structures that need to be modeled better with RC elements. For a driver, replacing the C_comp with a subcircuit complicates the use of V-t curves and calculation of the KT functions that turn on and off the I-V curves. Adding a parameter of C_comp_KT might be useful to indicate what C_comp value is useful for simulation. Radek: V-t curves are measured at the buffer. Arpad: This is really the die pad, because we don't have on-die interconnect currently. Walter: If we really want to have a final stage subcircuit, then we need a parameter to say that you'd use a specific capacitance for compensation algorithms. Randy: So you'd have C_comp that is just from the driver transistors, other capacitance modeled in the final stage circuit and a total C_comp value in the C_comp_KT? Walter: That's correct. Radek: You won't be able to replicate the V-t waveforms at the die pad 100% with just a C_comp_KT value. Arpad: If we start to add separate on-die interconnect and a final stage subcircuit, the C_comp in the buffer [Model] is not the same C_comp as we know it today. Would we be better off finding a replacement for C_comp that lets us use an ISS subcircuit, replacing C_comp in the tool and letting the tool adjust its compensation algorithm? Walter: It makes the implementation of the B-element a lot more complicated. Arpad: It would be up to the tool vendor to decide how to implement their compensation algorithms. What if we added a new parameter to the [Model] keyword to specify what point should be used for the compensation point, such as Pin, Pad or buffer terminal. Bob: The DUT values for V-t curves are in the spec for measurement purposes. They aren't widely used. Arpad: Defining the compensation point is flexible and useful if you are using on-die interconnect models. Walter: Using a BSS element would be the best way to go. Arpad: This puts a lot of burden on the model maker and might not be widely supported. ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives